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 FDMA530PZ Single P-Channel PowerTrench(R) MOSFET
January 2007
FDMA530PZ
Single P-Channel
-30V, -6.8A, 35m Features
Max rDS(on) = 35m at VGS = -10V, ID = -6.8A Max rDS(on) = 65m at VGS = -4.5V, ID = -5.0A Low profile - 0.8mm maximum - in the new package MicroFET 2X2 mm RoHS Compliant
PowerTrench(R)
tm
MOSFET
General Description
This device is designed specifically for battery charge or load switching in cellular handset and other ultraportable applications . It features a MOSFET with low on-state resistance. The MicroFET 2X2 package offers exceptional thermal performance for its physical size and is well suited to linear mode applications.
Pin 1
D
D
G
Bottom Drain Contact
Drain
Source
D D G
1
6
D D S
2
5
3
4
D
D
S
MicroFET 2X2 (Bottom View)
MOSFET Maximum Ratings TA = 25C unless otherwise noted
Symbol VDS VGS ID PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous -Pulsed Power Dissipation Power Dissipation Operating and Storage Junction Temperature Range (Note 1a) (Note 1b) (Note 1a) Ratings -30 25 -6.8 -24 2.4 0.9 -55 to +150 Units V V A W C
Thermal Characteristics
RJA RJA Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient (Note 1a) (Note 1b) 52 145 C/W
Package Marking and Ordering Information
Device Marking 530 Device FDMA530PZ Package MicroFET 2X2 Reel Size 7'' Tape Width 8mm Quantity 3000 units
(c)2006 Fairchild Semiconductor Corporation FDMA530PZ Rev.B
1
www.fairchildsemi.com
FDMA530PZ Single P-Channel PowerTrench(R) MOSFET
Electrical Characteristics TJ = 25C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = -250A, VGS = 0V ID = -250A, referenced to 25C VDS = -24V, VGS = 0V VGS = 25V, VDS = 0V -30 -23 -1 10 V mV/C A A
On Characteristics
VGS(th) VGS(th) TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Static Drain to Source On Resistance Forward Transconductance VGS = VDS, ID = -250A ID = -250A, referenced to 25C VGS = -10V, ID = -6.8A VGS = -4.5V, ID = -5.0A VGS = -10V, ID = -6.8A ,TJ = 125C VDS = -10V, ID = -6.8A -1 -2.1 5.4 30 52 43 17 35 65 63 S m -3 V mV/C
Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = -15V, VGS = 0V, f = 1MHz 805 155 130 1070 210 195 pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Gate to Source Gate Charge Gate to Drain "Miller" Charge VGS = -10V VGS = -5V VDD = -15V ID = -6.8A VDD = -15V, ID = -6.8A VGS = -10V, RGEN = 6 6 21 43 31 16 9 3.1 4.5 12 34 69 50 24 11 ns ns ns ns nC nC nC nC
Drain-Source Diode Characteristics
IS VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = -2A IF = -6.8A, di/dt = 100A/s -0.8 24 19 -2 -1.2 36 29 A V ns nC
Notes: 1: RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
a. 52C/W when mounted on a 1 in2 pad of 2 oz copper
b.145C/W when mounted on a minimum pad of 2 oz copper
2: Pulse Test: Pulse Width < 300s, Duty cycle < 2.0%. 3: The diode connected between the gate and the source serves only as protection against ESD. No gate overvoltage rating is implied.
FDMA530PZ Rev.B
2
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FDMA530PZ Single P-Channel PowerTrench(R) MOSFET
Typical Characteristics TJ = 25C unless otherwise noted
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
24 20
-ID, DRAIN CURRENT (A) VGS = - 4.5V VGS = -10V VGS = - 5.0V VGS = - 4.0V
3.5 3.0 2.5 2.0 1.5
VGS = -10V VGS = -3.5V VGS = -4.0V
16 12
VGS = -4.5V VGS = -5.0V
VGS = - 3.5V
8 4 0 0
PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX
1.0 0.5 0 4
PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX
1 2 3 4 -VDS, DRAIN TO SOURCE VOLTAGE (V)
5
8 12 16 -ID, DRAIN CURRENT(A)
20
24
Figure 1. On-Region Characteristics
Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage
200
rDS(on), DRAIN TO SOURCE ON-RESISTANCE (m)
NORMALIZED DRAIN TO SOURCE ON-RESISTANCE
1.8 1.6 1.4 1.2 1.0 0.8 -50
ID = -6.8A VGS = -10V
ID = -3.4A
PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX
150
100
TJ = 125oC
50
TJ = 25oC
-25
0
25
50
75
100
125
150
0 2 4 6 8 -VGS, GATE TO SOURCE VOLTAGE (V) 10
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. Normalized On- Resistance vs Junction Temperature
-IS, REVERSE DRAIN CURRENT (A)
Figure 4. On-Resistance vs Gate to Source Voltage
30
24
PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX
10 1 0.1 0.01 0.001
VGS = 0V
-ID, DRAIN CURRENT (A)
18
VDD= -5V
TJ = 125oC TJ = 25oC
12
TJ = 125oC TJ = -55oC
6
TJ = 25oC
TJ = -55oC
0 1 3 4 5 -VGS, GATE TO SOURCE VOLTAGE (V) 2 6
0.0001 0.0
0.4 0.8 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V)
1.6
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs Source Current
FDMA530PZ Rev.B
3
www.fairchildsemi.com
FDMA530PZ Single P-Channel PowerTrench(R) MOSFET
Typical Characteristics TJ = 25C unless otherwise noted
-VGS, GATE TO SOURCE VOLTAGE(V)
10
ID = -6.8A
2000
VDD = -10V
8 6 4 2 0 0 3
1000
CAPACITANCE (pF)
Ciss
VDD = -15V VDD = -20V
Coss
100
50 0.1
f = 1MHz VGS = 0V
Crss
6 9 12 Qg, GATE CHARGE(nC)
15
18
1 10 -VDS, DRAIN TO SOURCE VOLTAGE (V)
20
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain to Source Voltage
60
-ID, DRAIN CURRENT (A)
1E-3
-Ig, GATE LEAKAGE CURRENT(A)
VGS = 0V
rDS(on) LIMIT
1E-4 1E-5
TJ = 125oC
10
100us
1E-6 1E-7 1E-8 1E-9 0 5 10 15 20 25 30 35
-VGS, GATE TO SOURCE VOLTAGE(V)
TJ = 25oC
1
VGS= -4.5V
1ms 10ms 100ms 1s 10s DC
0.1
SINGLE PULSE R
JA
=145
o
C/W
TA = 25 C
o
0.01 0.1
1
10
100
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 9. Gate Leakage Current vs Gate to Source Voltage
P(PK), PEAK TRANSIENT POWER (W)
Figure 10. Forward Bias Safe Operating Area
2
NORMALIZED THERMAL IMPEDANCE, ZJA
150 120 90 60 30 0 -4 10
SINGLE PULSE o RJA = 145 C/W TA=25 C
o
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5 0.2 0.1 0.05 0.02 0.01
PDM
0.1
t1
SINGLE PULSE
t2
NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA
10
-3
10 10 10 10 t, PULSE WIDTH (s)
-2
-1
0
1
10
2
10
3
0.01 -3 10
10
-2
10
-1
10
0
10
1
10
2
10
3
t, RECTANGULAR PULSE DURATION (s)
Figure 11. Single Pulse Maximum Power Dissipation
Figure 12. Transient Thermal Response Curve
FDMA530PZ Rev.B
4
www.fairchildsemi.com
FDMA530PZ Single P-Channel PowerTrench(R) MOSFET
NOTES: A. NOT FULLY CONFORM TO JEDEC REGISTRATION MO-229 DATED AUG/2003. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M,1994
MLP06LrevA
FDMA530PZ Rev.B
5
www.fairchildsemi.com
FDMA530PZ Single P-Channel PowerTrench(R) MOSFET
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM ActiveArrayTM BottomlessTM Build it NowTM CoolFETTM CROSSVOLTTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACT(R) FAST(R) FASTrTM FPSTM FRFETTM FACT Quiet SeriesTM GlobalOptoisolatorTM GTOTM HiSeCTM I2CTM i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM ScalarPumpTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TCMTM TinyBoostTM TinyBuckTM TinyPWMTM TinyPowerTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHC(R) UniFETTM VCXTM WireTM
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
PRODUCT STATUS DEFINITIONS Definition of Terms
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
Datasheet Identification Advance Information
Product Status Formative or In Design First Production
Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Preliminary
No Identification Needed
Full Production
Obsolete
Not In Production
Rev. I22 FDMA530PZP Rev. B
6
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